Micron: HBM uses 3x the wafer of DDR5, and the gap keeps growing

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Micron: HBM uses 3x the wafer of DDR5, and the gap keeps growing

AI's appetite for memory is colliding with a hard physical limit, and the chipmakers are running out of room to hide it. Two stories from the last 24 hours — one from a conference stage, one from a balance sheet — show the same problem from different sides.


Micron used its Hot Chips 2026 presentation to make the case that the silicon cost of HBM, the stacked memory every AI accelerator relies on, has quietly tripled against ordinary DDR5, and the gap is widening with every generation. A single HBM3E die can push 256 GB/s of bandwidth, against roughly 8 GB/s for a DDR5 die, but reaching those numbers takes 256 banks running in parallel and far more die area for data paths, power delivery, and the through-silicon vias that link each memory layer to the base logic die. Micron's framing is blunt: compute performance is scaling at roughly three times every two years, HBM bandwidth at under two times, and the divergence is what its engineer called the memory wall getting "worse, not better." The base die runs hottest because it sits beneath the stack, and the company now says it is "architecting solutions around thermals rather than the other way around." Micron also pointed at Meta's Llama 3 paper, which attributed 17.2% of unexpected interruptions during a 54-day run across 16,384 H100 GPUs to HBM3 memory failures — the second-largest cause after dead GPUs. The price tag tracks the silicon: a single HBM4 stack now sells for around $392, against a still-climbing DDR5 baseline, and 128 GB of DDR5 has touched $3,399 at retail. The plain reading is that HBM is the AI buildout's most expensive tax on a wafer, and there is no architectural escape hatch in sight.


Marvell delivered a clean beat and got punished for it, the clearest signal yet that the AI chip market has moved into a phase where "good" is no longer enough. Marvell reported second-quarter revenue up 37% year-on-year to $2.7 billion, raised its fiscal 2028 forecast to about $18 billion, and watched its shares drop 8% in premarket trading. The miss wasn't in the numbers; it was in the framing. The company offered limited detail on fiscal 2028, and Goldman Sachs analysts flagged that investor expectations had been "elevated" coming in, lifted by a recent Google warrant worth up to $12.2 billion in Marvell shares and by the broader conviction that custom AI silicon will eat more of the hyperscaler stack. With Marvell up 184% year to date, the bar keeps moving. The dynamic is familiar by now: the AI infrastructure trade is so crowded that any hint of uncertainty in forward guidance gets priced as a warning, regardless of the headline beat. We covered Google's $12.2 billion Marvell warrant as the structural story — Google locks in $12.2B Marvell chip warrant as AI silicon race heats up — and the post-earnings reaction suggests the market has already moved past the deal and is now repricing execution risk.


What to watch: Whether SK hynix and Samsung confirm the same widening wafer penalty at the next memory conference, and whether any hyperscaler guides a memory-light inference architecture to escape the bill.

If HBM keeps eating more wafer per bit, do AI accelerators eventually hit a cost wall before they hit a compute one? Tell us in the comments.

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