Houmo moves compute inside memory — and A20 enters production
Beijing chipmaker Houmo used its partner conference this week to lay out two compute-in-memory routes at once — and to say the first chip built on the newer one is already in production.
Houmo's A20, its first chip built on a 3D compute-in-memory architecture, has entered production. The part supports up to 16 chips fully interconnected, claims a 50% improvement in compute utilization over the previous generation, and covers models from 3B to 30B parameters, according to co-founder and product vice president Xin Xiaoxu, who gave the roadmap at the company's smart-terminal and ecosystem partner conference in Beijing on October 14. Two follow-ons are already mapped: M6X, an iteration on the current flagship M50 that Houmo says will reach three to six times its combined capability, and A30, planned for mass-market consumer devices on a high-compute, low-power brief. The company is also building small modules and PCIe cards that it says can run anything from tens of billions to over a trillion parameters locally.
The architecture is the reason this is more than a product launch. Conventional accelerators burn most of their energy shuttling model weights between memory and compute units — the memory wall that makes inference expensive. Houmo puts the multiply-accumulate work inside the SRAM array itself, so the weights sit where the math happens. On the M50's AI core, that cut core area to roughly two-fifths of a conventional implementation and power to about one-fifth, the company says.
Houmo now splits that foundation two ways: 2D CIM, pairing SRAM-CIM with 2D packaging for workloads that want raw compute density and flexible weight capacity — image and video generation, mixture-of-experts models — and 3D CIM, in development for three years, which stacks a compute die under memory to attack the bandwidth ceiling dense models hit during decoding. The framing matters because a single architecture genuinely cannot serve both ends: 2D hits a bandwidth wall as parameter counts grow, while conventional 3D stacking trades away compute area and heat dissipation.
The commercial numbers are the part worth watching. M50 has been in volume production for under a year and has collected more than 150 product design wins across over 100 customers — the same figure the company cited at a chip summit in September, suggesting the pipeline is broad but not yet compounding month over month. Several are shipping products rather than demos: Lenovo's AI host P7, a 300-gram box built on M50 that runs up to 122B parameters locally at 190 TOPS with 128K context, with full details promised for an October 24 launch event; China Electronics' Great Wall N90Pro laptop, pairing an M50 with a Phytium D3000M CPU to run 35B models on a one-kilogram machine at 0.35W standby; and SenseTime's AI Box for data-sensitive offices, which Houmo says compresses three-to-five-hour analysis work into three to five minutes at over 95% output accuracy.
Houmo also open-sourced its ecosystem software — inference framework integrations, domain development kits, a model zoo, middleware and sample applications — and launched an Agent Computer co-creation program with dozens of CPU, operating system, model and inference-framework vendors. The company drew a firm boundary around itself: chips, board-level hardware, compilers and toolchains, no finished devices, no upper-layer apps. CEO Wu Qiang's stated goal is blunt — be the compute base for a "free token factory" at the edge, driving the marginal cost of a locally generated token toward zero.
That ambition runs against the current economics of the industry, where memory prices are climbing and every large lab is pushing users toward metered cloud inference. It also explains why the memory-wall fight matters outside China: the same physical constraint shapes what a Mac, a Copilot+ PC or a phone can run offline. Houmo's answer is to stop moving the weights and start computing where they already sit — a smaller architectural bet than a new process node, and one that trading partners can buy without waiting on a fab.
We covered the other end of this fight in September — d-Matrix stacks DRAM on its chip and claims 100 TB/s.
What to watch: whether Lenovo's October 24 event gives the P7 a price and a shipping date, and whether A20 lands a named customer before year end.
Would you pay a hardware premium to run agents locally instead of renting cloud inference? Tell us in the comments.
